CODEWITHSUNDEEP
cmakefilegnu-make
worenga
worenga

Reputation: 5856

Makefile use target name for wildcard in prerequisite

.
├── include
│   ├── a
│   │   └── defs.h
│   ├── b
│   │   └── defs.h
│   └── c
│       └── defs.h
├── lib
│   ├── a
│   │   ├── a1.c
│   │   ├── a2.c
│   │   └── a3.c
│   ├── b
│   │   ├── b1.c
│   │   ├── b2.c
│   │   └── b3.c
│   └── c
│       ├── c1.c
│       ├── c2.c
│       ├── c3.c
│       └── defs.h
├── Makefile
└── tools
    └── main.c

I want to compile each of the individual lib directories into a build/{a,b,c}.so

My Makefile stub attempt to do this is as follows:

#Directories for object files and deps
BUILDDIR:=build/
DEPSDIR:=.deps/
LIBDIR=lib/
INCLUDEDIR=include/

#A list of the libraries, sort-hack to removes dups
LIBS=$(patsubst $(LIBDIR)%/,%, $(sort $(dir $(wildcard $(LIBDIR)*/))))
SHAREDLIBS=$(patsubst %, $(BUILDDIR)$(LIBDIR)%.so, $(LIBS))

.PHONY: all clean

#first target is should be all
all: $(SHAREDLIBS)

%.so: $(patsubst %.c,$(BUILDDIR)%.o, $(wildcard $(LIBDIR)$(patsubst $(BUILDDIR)$(LIBDIR)%.so,%,$@)/*.c))
    @echo $(patsubst %.c,$(BUILDDIR)%.o, $(wildcard $(LIBDIR)$(patsubst $(BUILDDIR)$(LIBDIR)%.so,%,$@)/*.c))
    @echo $@: $?

However the last %.so: target does not seem to expand the prerequisite. Basically, i want to expand to the object files of that particular folder to write a subsequent rule to build them.

Upvotes: 1

Views: 687

Answers (1)

Eric
Eric

Reputation: 471

The issue is the ambiguity of "%" used in pattern rules and patsubst, please try following changes,

SUBSTITUTE=$(patsubst %.c,$(BUILDDIR)%.o,$(wildcard $(LIBDIR)$(patsubst $(BUILDDIR)$(LIBDIR)%.so,%,$@)/*.c))

$(BUILDDIR)%.o: %.c
         @echo Compiling $@, $<

.SECONDEXPANSION:        
%.so: $$(SUBSTITUTE)
         @echo Building $@: $?

, the rule for %.o is just one placeholder to define how it should be compiled.

Upvotes: 2

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