CODEWITHSUNDEEP
cgccassemblymips
pbn
pbn

Reputation: 2706

MIPS machine code optimization

In general I was studying pipelining in processors, below is an example code that forces data dependencies between two instructions in sequence and I wanted to see if there are any consequences in the assembly code. 

int func(int a, int b, int c, int d){
    a += b;
    d += a + c;
    return d;
}

Compiled and disassembled using (gcc 4.8.5):

mips-sde-elf-gcc -O1 -o func func.c -c && mips-sde-elf-objdump -S func

And here is the output:

00000000 <func>:
0:  00852021    addu    a0,a0,a1
4:  00861021    addu    v0,a0,a2
8:  03e00008    jr  ra
c:  00471021    addu    v0,v0,a3

Question: Why is there a jump return instruction before computing and placing final result into a return register ? Is this some kind of clever pipelining use or the output isn't a real case because not linked into final executable?

Upvotes: 1

Views: 769

Answers (1)

skyking
skyking

Reputation: 14360

On MIPS the instruction after a branch instruction is (almost) always executed, this is by design as it would mean that one could utilize the pipeline more efficiently.

The reason is that when the branch instruction is executed the instruction after it has already been fetched and decoded, but the instruction at the branch target has not been fetched yet at this moment.

Upvotes: 3

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