Reputation: 55
Edit:
This is different than the other question because the variables that I put on the unix command line will be "p2 -s input.txt", where my main.c file will manipulate them.
So normally when working with command line arguments, my code would be something like:
int main(int argc, char argv[])
{
printf("%d", argc);
return 0;
}
How would I do this with a makefile?
Upvotes: 0
Views: 988
Reputation: 753705
Use a makefile like this:
COMMAND = echo 'You did not specify make COMMAND="cmd 2 run" on the command line'
all:
${COMMAND}
Now when you run make COMMAND="p2 Hi"
, you will get that command run and the appropriate output. If you forget to specify COMMAND="something or another"
then you get an appropriate memory jogger.
Upvotes: 0
Reputation: 37834
GNU make is not C.
Passing arguments cannot be done the same way.
If you'd like to provide custom arguments to your makefile,
you may consider doing this through variable assignments.
for example, take the following makefile:
all:
@echo $(FOO)
It can be called via the command line like this:
make FOO="test"
and it will print test
.
Other options to consider:
Upvotes: 2