Does x86_64 have an equivalent to the aarch64 at instruction?

Question

ARM's aarch64 has an AT (Address Translate) instruction that runs a virtual address through a stage of address translation returning a physical address in PAR_EL1, along with status to indicate whether the translation exists. See ARMv8 ARM, Section C5.5.

The question is: does x86_64 have the equivalent? Intel's System Programming Guide (Volume 3, Chapter 5) talks about pointer validation, but these methods seem to apply to segment-level protection, and there do not appear to be any page-level protection pointer validation instructions.

Is anybody aware of an ARMv8-AT-like instruction for x86_64?

Answer 1

No, the x86-64 instruction set does not have an instruction to perform physical-to-virtual address translation. It only has basic instructions like setting the page directory register, invalidating addresses, and enabling paging.

If you want this functionality on x86-64, I'm afraid you need to be in supervisor mode to do so. You would read the CR3 register, possibly change a few page table mappings to access the physical addresses you need, and perform the address translation by manually walking the page directory and tables.

Your question raises a question in response: For what purpose do you need to know about virtual-to-physical address translations? Paging is supposed to be transparent to application programs, and it is rare to have a good reason to know the physical memory address corresponding to a particular virtual memory address.