CODEWITHSUNDEEP
armprecisionsimd
Asd Dfg
Asd Dfg

Reputation: 67

Does ARM support SIMD operations for 64 bit floating point numbers?

NEON can do SIMD operations for 32 bit float numbers. But does not do SIMD operations for 64 bit float numbers. VFU is not SIMD. It can do 32 bit or 64 bit floating point operations only on one element.

Does ARM support SIMD operations for 64 bit floating point numbers?

Upvotes: 5

Views: 2708

Answers (2)

Ciro Santilli
Ciro Santilli

Reputation: 4043

ARMv8

In ARMv8, it is possible:

fadd v2.2d, v0.2d, v1.2d

Minimal runnable example with an assert and QEMU user setup.

The analogous ARMv7 does not work:

vadd.f64 q2, q0, q1

assembly fails with:

bad type in Neon instruction -- `vadd.f64 q2,q0,q1'

Minimal runnable 32-bit float v7 code for comparison.

Manual

https://static.docs.arm.com/ddi0487/ca/DDI0487C_a_armv8_arm.pdf A1.5 "Advanced SIMD and floating-point support" says:

The SIMD instructions provide packed Single Instruction Multiple Data (SIMD) and single-element scalar operations, and support:

  • Single-precision and double-precision arithmetic in AArch64 state.

For ARMv7, F6.1.27 "VADD (floating-point)" says:

<dt> Is the data type for the elements of the vectors, encoded in the "sz" field. It can have the following values:

F32 when sz = 0 F16 when sz = 1

but there is no F64, which suggests that it is not possible.

Upvotes: 3

Dric512
Dric512

Reputation: 3729

This is only possible on processors supporting ARMv8, and only when running Aarch64 instruction set. This is not possible in Aarch32 instruction set.

However most processors support 32-bit and 64-bit scalar floating-point operations (ie floating-point unit).

Upvotes: 3

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