Reputation: 686
I am trying to compile a kernel module that has two .c files. My Makefile is the following
module-y: dummy.o library.o
obj-m += module.o
default:
make -C /lib/modules/`uname -r`/build M=$(PWD) modules
When I run this I get
cc -c -o dummy.o dummy.c
dummy.c:3:24: fatal error: linux/init.h: No such file or directory
It seems the Makefile doesn't know where to find the headers now.
I have tried using CFLAGS to add include directories, but there are so many of them that it becomes tedious and hard to do (haven't managed to make it work).
I would like to generate these two .o files using the include directories that are (magically) used when using a single .c file. Everything works fine in that case.
How to fix the include directories when using two source files?
Upvotes: 0
Views: 644
Reputation: 16540
I wrote the Makefile like the following, and it worked:
ifneq ($(KERNELRELEASE),)
# kbuild part of makefile
obj-m := module.o
module-y := library.o dummy.o
else
# normal makefile
KDIR ?= /lib/modules/`uname -r`/build
default:
$(MAKE) -C $(KDIR) M=$$PWD modules
endif
Upvotes: 1