CODEWITHSUNDEEP
variablessignalstaskverilog
matt
matt

Reputation: 11

Passing a signal name into a verilog task

Instead of this task just toggling tb.stimulus.top.Ichip0.vbiash high and low ten times I would like to be able to call it passing in any signal tb.stimulus.top.Ichip0.vbiasl, tb.stimulus.top.Ichip0.vbiasx, or tb.stimulus.top.Ichip0.vbiasz and make them toggle as well. For example toggle_signal(tb.stimulus.top.Ichip0.vbiasl); Is it possible to do this. If so I would really appreciate an example of how I would accomplish this.

task toggle_signal;

begin

  for (monpad_index=0; monpad_index < 10; monpad_index = monpad_index + 1)

  begin

    #1000;

    force tb.stimulus.top.Ichip0.vbiash = 1'b1;

    #1000;

    force tb.stimulus.top.Ichip0.vbiash = 1'b1;

    #1000;

  end

end

Upvotes: 1

Views: 5051

Answers (3)

Charles Clayton
Charles Clayton

Reputation: 17986

Here you go. The following code passes a signal name as a parameter to a task then prints the signal name as a string. Tested in iverilog.

reg this_is_some_signal_name;


`define NAME(net) `"net`"

task print;
    input reg [32*8] str;
    begin
        $display(">>> %0s", str);
    end
endtask


initial begin
    print(`NAME(this_is_some_signal_name));
    $finish;
end

Outputs:

>>> this_is_some_signal_name

Upvotes: 0

Greg
Greg

Reputation: 19122

If you are not afraid do dive into a little C programming, you could write your own PLI/VPI. I suggest checking out IEEE Std 1800-2012's sections on PLI/VPI (§ 36, 37, & 38). Your come may looks something like the following (Note, the code is a starting reference. I haven't tested it):

static int my_vpi_force_release_calltf(PLI_BYTE* user_data) {
  vpiHandle sys, argv, signal;
  p_vpi_value p_value;
  int force_release;
  force_release = (int) user_data;
  sys = vpi_handle(vpiSysTfCall, 0);
  argv = vpi_iterate(vipArgument, sys);
  signal = vpi_handle_by_name(vpi_get_str(vpi_scan(argv), 0);
  if (force_release != 0 ) {
    vpi_get_value(vpi_scan(argv), p_value);
    vpi_put_value(signal, p_value, 0, vpiForceFlag);
  } else {
    vpi_get_value(signal, p_value);
    vpi_put_value(signal, p_value, 0, vpiReleaseFlag);
  }
  return 0;
}
void register_my_vpi_force_release()
{
    s_vpi_systf_data data;
    data.type      = vpiSysTask;
    data.calltf    = my_vpi_force_release_calltf;

    data.tfname    = "$my_force";
    data.user_data = (PLI_BYTE8 *) 1;
    vpi_register_systf(&data);

    data.tfname    = "$my_release";
    data.user_data = (PLI_BYTE8 *) 0;
    vpi_register_systf(&data);
}

You can call your PLI/VPI tasks in verilog:

task toggle_signal( input [80*8-1:0] path_str );
integer index;
begin
  for (index=0; index < 10; index = index + 1)
  begin
    #1000;
    $my_force( path_str, 1'b1);
    #1000;
    $my_force( path_str, 1'b0 );
    #1000;
  end
  $my_release( path_str );
end
endtask
...
initial begin
   ...
   toggle_signal( "tb.stimulus.top.Ichip0.vbiash" );
   ...
end

If you don't want to write your own custom PLI/VPI, then I suggest enabling SystemVerilog and include UVM (the major simulators have UVM build in, or download it yourself). The UVM library has a build in method uvm_hdl_force/uvm_hdl_release.

Upvotes: 0

dave_59
dave_59

Reputation: 42788

You cannot pas the name of a single to a task. But you can create a macro to do this.

`define toggle_signal(sig) \
  for (monpad_index=0; monpad_index < 10; monpad_index = monpad_index + 1) \
  begin \
    #1000 force tb.stimulus.top.Ichip0.sig = 1'b1; \
    #1000 force tb.stimulus.top.Ichip0.sig = 1'b0; \
    #1000; \
  end

and then write

`toggle_signal(vbiash)
`toggle_signal(vbiasl)

Upvotes: 5

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