CODEWITHSUNDEEP
pci-epci-bus
Ap.padole
Ap.padole

Reputation: 93

PCIe peer to peer communication

Can two independent devices(endpoints) communicate with each other without Root Complex being involved in PCIe (according to PCIe specification yes but how)?

How can one endpoint know address of other endpoint in case of memory and IO transactions?

How are the packets routed by switch between two downstream ports?

Thanks and regards

Upvotes: 5

Views: 5890

Answers (1)

Mana
Mana

Reputation: 83

Yes it is possible.

As you told Memory Write transactions requires "valid" Addr of recipient and Data and Memory read transactions requires "Vaild" Addr and data "size " required to creates write or read requests.

For the requests from Downstream port, switch takes care of routing to any Upstream (Root) or Downstream (peer to peer), by comparing with its "Base and Limit" Registers.

Switch Routing:

  1. First check the address on its own bars, if it matched, it will consume. Two bars are available in each Switches.

  2. If not, check its IO/P-MMIO/NP-MMIO Base and Limit Register pairs based on the request type.

  3. If a TLP travels to Upstream port and if it matches to its Base and Limit Registers it will be handled as "Unsupported Request" on secondary interface. ( again it will pass to the downstream port, other than one that it received, since it may be peer-to-peer communication).

  4. If not matches at any interface, it will forwarded to its primary interface as it not matches for the bridge and any function beneath this bridge.

Upvotes: 5

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