user6038872
user6038872

Reputation:

Neon support in Armv8 system mode qemu

Does system mode AArch64 QEMU supports the NEON instruction set? Is there any configure able things to enable the NEON support in AArch64 system mode QEMU?

Upvotes: 1

Views: 1695

Answers (2)

Which regs to touch was asked at: Enable neon on ARM cortex-a series

However, QEMU 2.11.0 starts in EL1, not in EL3 like a real CPU, so you have to skip the EL3 initialization and use just:

mov x1, #(0x3 << 20)
msr cpacr_el1, x1
isb

The initial mode QEMU starts can be verified by adding a:

mrs x0, currentel

and using GDB to print the register.

EL3 is not even implemented yet, and EL2 is a recent addition: https://www.linaro.org/blog/whats-new-qemu-2-9/

Tested with this setup.

Upvotes: 0

Peter Maydell
Peter Maydell

Reputation: 11413

All QEMU's AArch64 emulated CPUs support NEON (SIMD) by default -- the SIMD instruction support is more-or-less a required part of the ARMv8 architecture so if we didn't emulate it then we would be unable to run Linux or any other interesting guests.

If you're running a "bare metal" guest OS of your own devising, you will need to make sure you write to the appropriate CPU system registers to enable SIMD, exactly as you would have to with real hardware.

Upvotes: 2

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