CODEWITHSUNDEEP
protocolscan-busstm32f4discovery
naumaan
naumaan

Reputation: 95

How NVIC function working NVIC_EnableIRQ(CAN1_RX0_IRQn);

so my friend asked me to write my own implementation for above function NVIC_Enable_IRQ(CAN1_RX0_IRQn); to enable can reception interrupt.

initially i thought its impossible to right such implementation ..

could anybody please explain me like the register associated with NVIC where i directly go and change the required value ,so that there is no need of implementation of above function and CAN reception interrupt is enabled.

this line NVIC_EnableIRQ(CAN1_RX0_IRQn); i copied from example code given in stm32f example code of CAN

Upvotes: 1

Views: 1931

Answers (1)

Guillaume Michel
Guillaume Michel

Reputation: 1214

Everything that starts with NVIC_ is part of the CMSIS library supplied by ARM to set up the ARM core (which is independent of the MCU manufacturer). You don't really want to mess with them, so you'd better use them.

In the CMSIS core_cm4.h (for a cortex M4), you can find:

__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
{
  NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
}

Now, if you don't want to call NVIC_EnableIRQ or if you don't want to use the CMSIS, well good luck, you need to read the ARM core documentation to check which addresses you need to modify. The ARM core documentation can be found on the ARM or Keil website. For example, you might find those links useful for the Cortex M4:

https://www.arm.com/products/processors/cortex-m/cortex-m4-processor.php http://www.keil.com/dd/docs/datashts/arm/cortex_m4/r0p1/dui0553a_cortex_m4_dgug.pdf

Upvotes: 3

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