CODEWITHSUNDEEP
c++makefilebuild-automationgnu-make
Dov
Dov

Reputation: 8542

how do I make a makefile depend on the build options

A long time ago, I remember using some Solaris make, and they had an ingenious option that would automatically detect when the compiler options had changed, and rebuild all rules appropriately. For example, suppose I switch from:

g++ -O3

to

g++ -g

Then all files should be recompiled. I'm using gnu make, and haven't found any feature like this, and was wondering whether anyone has a way of making it work.

Upvotes: 3

Views: 3790

Answers (3)

Jack Kelly
Jack Kelly

Reputation: 18657

Here's a basic way to do this (although I'm convinced it's a terrible idea, see below):

-include CFLAGS.save

CFLAGS := -O2 -g

all: foo

CFLAGS.save:
    echo 'CFLAGS_SAVE := $(CFLAGS)' > $@
ifeq ($(CFLAGS),$(CFLAGS_SAVE))
%.o: %.c CFLAGS.save
    gcc $(CFLAGS_SAVE) -c -o $@ $<
else
.PHONY: CFLAGS.save
%.o: %.c CFLAGS.save
    $(MAKE) $@
endif

foo: foo.o
    gcc -o $@ $^

Here's what happens: Before any compilation is done, the current CFLAGS are written out to CFLAGS.save. If CFLAGS isn't equal to CFLAGS_SAVE, then the user must've changed them. If so, we declare CFLAGS.save to be phony so make will rebuild it. Note also that if CFLAGS has changed, we'll update it but we'll still have the old value in memory. Therefore, we have to recursively invoke make for every source file. Not cool on a big project.

The other problem is that if you neglect to specify CFLAGS on the command line, it will go back and rebuild everything with the default. You could work around this by testing the $(origin) of CFLAGS, but seriously, no. My professional ethics won't allow me to stand for this.

make is meant to be simple. Distributors already have enough trouble understanding packagers' abuses of build tools (sadly, most of the blame levelled at automake is due to this). Please, just say no to Cthulhoid build systems.

Besides, make clean all CFLAGS='-Whatever -foo' will work just as well.

Upvotes: 2

Nikolai Fetissov
Nikolai Fetissov

Reputation: 84151

Just make your target depend on the makefile itself:

all: a.out

a.out: boo.c Makefile
        cc -O3 -g boo.c

Upvotes: 0

Didier Trosset
Didier Trosset

Reputation: 37427

A simple way to achieve this with gmake is to write the gcc options into a file. Then, in the Makefile, read these options to a variable, use this variable in the gcc command line, plus add the dependency for all object files to this option file (can be done in the pattern rule).

Upvotes: 4

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