Reputation: 89
I have a sequence of instruction for a function followed by following two instructions
Loop: .
.
.
.
SUB R20, R4, Rx
BNZ R20, Loop
Is BNZ, branch not zero data dependent on SUB instruction? or is it anti-dependency?
Upvotes: 4
Views: 919
Reputation: 64905
In theory, there exists a data-dependency between the branch instruction and the earlier instruction (the SUB
in this case) that modifies the register the branch will examine to jump, but on many modern architectures this dependency does not propagate to the following instructions, unlike other data dependencies, due to branch prediction.
Instead, we say that the following instructions have a control dependency on the jump, and this control dependency behaves very differently than a data dependency.
That is, on architectures with prediction the data dependency isn't likely to actually cause the branch to take effect after the SUB
- usually it will take effect (i.e., jump or not) before the SUB
is executed, and only later when the result of the SUB
is available will the guess be checked, and all the speculative execution since the branch will be rolled back if the guess was incorrect.
So in a way jumps exist in a grey area when it comes to data dependency on their condition and on their target. In the strictest sense they are dependent, but when prediction is working (and usually it is), they don't behave like that. It's a bit like the grey area that xor r1, r1, r1
or foo32bits >> 32
exist in: by the strict definition these instructions depend on their inputs, but in these particular case it happens that the answer is always the same (0) and some CPUs may recognize this and not apply the usual dependency rules.
Upvotes: 4
Reputation:
Yes, there exists a data dependency between the instructions. A branch instruction breaks down into a comparison and a jump. The comparison will be evaluated by the ALU, and then update the PC accordingly. The inputs to that comparison operation are dependent the same way any other operation would be.
Upvotes: 2