CODEWITHSUNDEEP
assemblypic
aod
aod

Reputation: 15

clearing memory location with indirect adressing

hi i'm a newbie in assembly coding in pics. there is a code that i couldn't see:

 BCF   STATUS,IRP
 MOWLW 70h
 MOVWF FSR
 TOP  CLR   INDF
 INCF  FSR,F
 BTFSS FSR,7
 GOTO  TOP

OK here is my question: first how this INDF works on FSR? INCF FSR,F how this increment instruction works on F register? thanks

Upvotes: 0

Views: 1559

Answers (2)

Vanger
Vanger

Reputation: 1

    BCF   STATUS,IRP ; Clears the IRP bit of the STATUS register
    MOWLW 70h        ; Moves the hexadecimal value 70 into the "working register" (WREG)
    MOVWF FSR        ; Moves the value in WREG into the FSR register (this register is used as the address that INDF takes values from)
TOP CLR   INDF  ; Clears the register pointed to by the address in FSR
    INCF  FSR,F      ; Adds one to the address in FSR (sets pointer to next address)
    BTFSS FSR,7      ; Tests the highest bit of the 0x** value in the FSR register and skips the next instruction if it is 1
    GOTO  TOP        ; Jumps to the code location with the label "TOP"

Basically, this whole section of code is setting all RAM/Memory from 0x70 to 0x7F to be equal to zero, then it runs whatever code follows the section of assembly code.

Upvotes: 0

Margaret Bloom
Margaret Bloom

Reputation: 44116

This manual from Microchip will help you understand the instructions

BCF   STATUS,IRP          ;Bit Clear register File
;Clear bit IRP (bit7) of register STATUS (Select bank 0 and 1)

MOVLW 70h                 ;MOVe Literal to W register
;Set W = 70h (End of register, start of SRAM)

MOVWF FSR                 ;MOVe W to F
;Set FSR (File Select Register) = W = 70h

TOP                       ;Label
   CLRF   INDF            ;CLeaR register File
   ;Clear register INDF (INDirect register File), this access memory location at FSR

   INCF  FSR,F            ;INCrement register File
   ;Increment FSR and place the result in FSR (F parameter)

   BTFSS FSR,7            ;Bit Test in register File, Skip if Set
   ;If bit7 of FSR is set skip next instruction (Break the loop)

GOTO  TOP                 ;GO TO TOP label

PIC has only one "internal" register, called W.
PIC has also an internal RAM (implemented as SRAM).
The internal RAM is partitioned into up to four banks that must be manually selected by the programmer.
Each bank is 128 bytes.

Registers are actually address in bank in the internal RAM, a register like STATUS is just an alias (a define in C terms) for the number 3 (the address of the register, the register is mirrored on every bank).
Each register is 8 bit wide.
The first addresses (on PIC16 up to 20h) of each bank are used for Special function registers.
Address from 20h-to 7fh (for PIC16) in any bank are used for General Purpose registers or scratch RAM (the concepts coincides on PIC architecture).
On same version, the address from 70h to 7fh are mirrored across the banks.

PIC doesn't support indirect address at instruction level. To read a memory an arbitrary memory location it must be written into FSR and then accessing INDF will actually access the address written in FSR.
Since PIC registers are 8 bit this would allow a programmer to access an address like 80h (which is not possible with normal instructions).
The IRP bit in STATUS handles this: if it is 0 banks 0 and 1 can be accessed by INDF (bank 0 ranging from 00h to 7fh, bank 1 above) if it is 1 banks 2 and 3 are accessed.

So the BCF instruction clears IRP to select bank 0 and 1.
The next two instructions just set FSR = 70h (There is no MOVLF instruction). CLRF use indirect access to clear the address given by FSR.
INCF increment FSR and write the result back to FSR (the other form is INCF FSR, W that would increment FSR and set the result in W).
BTFSS is used to break the loop, if bit7 of FSR is set (i.e. FSR >= 80h) the next instruction (GOTO) is skipped and the loop stops.

Upvotes: 2

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