CODEWITHSUNDEEP
timerstm8
KansaiRobot
KansaiRobot

Reputation: 9912

STM8 timer not ticking at the right time

I am working with a STM8 timer (not my code, but maintaining it) and in it it uses a timer. Apparently the clock is set at 16MHz erfo 0.0625uS. The settings of the timer are ARRH=0x03 ARRL=0x20 therefore (0x0320=800) it resets at 800 (ergo 50us) PSCR is set at 0 so the timer has the same freq as the micro.

Anyway, when checking this with an oscilloscope, it does not give good readings. The timer interrupt is called at: 56us , 54uS, 54uS, 52uS, 52uS, 52us, 38us(!!!), 42us(?), 50us, 50us....

curiosly summed up it gives 500uS so it does count as 10 times 50uS

The first 8 times at the timer interrupt some AD conversion is happening so there is the possibility that an AD interrupt is being called in between too.

1) Do you think this is affecting the frequency of the timer?

2) why does it "correct" itself by firing an interrupt at 38uS??

I would appreciate any comment based on your embedded or STM8 experience, since I know precise answers would need to examine the code...

Upvotes: -1

Views: 1298

Answers (2)

Ammar Ahmed Mughal
Ammar Ahmed Mughal

Reputation: 11

Sharing for all.

STM8 timer doesn't stops counting after an overflow or underflow.

For 38us, the timer counter was already running meanwhile timer ISR (the one before the 38us) was pending for 12us, so the time for next ISR narrowed.

Upvotes: 1

maze
maze

Reputation: 884

I'm not sure if you still need an answer. I once had the same and searched for a long time... simple solution in my case:

I had an ADC ISR with high jitter. That came from my main loop. In some sub-sub-sub routine the ADC interrupt was temporarily deactivated for a critical section (data transfer between interrupt and main loop context). The effect is exactly what you discribe:

Sometimes the time between two interrupts is longer, because the interupt is pending and waiting for execution until the interrupt is enabled again. The timer is still continuing to run. Timing example:

  1. interrupt is disabled in main loop (or sub routine)
  2. interrupt flag is set by timer -> interrupt pending
  3. interrupt is enabled again -> ISR is executed too late
  4. interrupt is disabled in main loop
  5. interrupt flag is set by timer -> pending
  6. interrupt is enabled again -> ISR is executed much too late
  7. main loop does NOT disable interrupt for some case (maybe by control flow, maybe timing issue)
  8. The next interrupt is executed at the right time which is 50 us after raising the last interrupt, NOT 50 us after calling the last ISR. --> time between ISR calling is shortened.

I hope I could help.

Upvotes: 3

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