CODEWITHSUNDEEP
cbuildmakefile
jasonbogd
jasonbogd

Reputation: 2491

"make clean" results in "No rule to make target `clean'"

I am running Ubuntu 10.04. Whenever I run make clean, I get this:

make: *** No rule to make target `clean'. Stop.

Here is my makefile:

CC = gcc
CFLAGS = -g -pedantic -O0 -std=gnu99 -m32 -Wall
PROGRAMS = digitreversal
all : $(PROGRAMS)
digitreversal : digitreversal.o
       $(CC) $(CFLAGS) -o $@ $^ $(LDFLAGS)
.PHONY: clean
clean:
       @rm -f $(PROGRAMS) *.o core

Any ideas why its not working?

EDIT: It seems like doing:

make -f Makefile.txt clean

works. Now: is there any setting to change so I don't have to do the -f Makefile.txt every time?

Upvotes: 31

Views: 164792

Answers (6)

debugsaurav
debugsaurav

Reputation: 19

May be this will help some one some day.

I made my Makefile on MacOs and copied it across to Linux (mint OS). This for some reason doesn't sit well(dont exactly know why). Simply open the Makefile with vim and then save and exit. After this it should start to work as per normal

Upvotes: 0

Siddique
Siddique

Reputation: 384

It seems your makefile's name is not 'Makefile' or 'makefile'. In case it is different say 'abc' try running 'make -f abc clean'

Upvotes: 28

Navaneetha Kandethodi
Navaneetha Kandethodi

Reputation: 71

I suppose you have figured it out by now. The answer is hidden in your first mail itself.

The make command by default looks for makefile, Makefile, and GNUMakefile as the input file and you are having Makefile.txt in your folder. Just remove the file extension (.txt) and it should work.

Upvotes: 7

Spaceghost
Spaceghost

Reputation: 6985

Check that the file is called GNUMakefile, makefile or Makefile.

If it is called anything else (and you don't want to rename it) then try:

make -f othermakefilename clean

Upvotes: 2

Michael F
Michael F

Reputation: 40829

You have fallen victim to the most common of errors in Makefiles. You always need to put a Tab at the beginning of each command. You've put spaces before the $(CC) $(CFLAGS) -o $@ $^ $(LDFLAGS) and @rm -f $(PROGRAMS) *.o core lines. If you replace them with a Tab, you'll be fine.

However, this error doesn't lead to a "No rule to make target ..." error. That probably means your issue lies beyond your Makefile. Have you checked this is the correct Makefile, as in the one you want to be specifying your commands? Try explicitly passing it as a parameter to make, make -f Makefile and let us know what happens.

Upvotes: 1

Simone
Simone

Reputation: 11797

This works for me. Are you sure you're indenting with tabs?

CC = gcc
CFLAGS = -g -pedantic -O0 -std=gnu99 -m32 -Wall
PROGRAMS = digitreversal
all : $(PROGRAMS)
digitreversal : digitreversal.o
    [tab]$(CC) $(CFLAGS) -o $@ $^ $(LDFLAGS)

.PHONY: clean
clean:
    [tab]@rm -f $(PROGRAMS) *.o core

Upvotes: 1

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