CODEWITHSUNDEEP
stm32adc
Radek23445
Radek23445

Reputation: 113

stm32f103 ADC sampling rate

I set adc sample time cycles here :

ADC_RegularChannelConfig(ADC1, ADC_Channel_17, 1, ADC_SampleTime_71Cycles5);

How to calculate sampling rate of ADC from that in stm32f103 ?

Upvotes: 1

Views: 16682

Answers (2)

Yuriy
Yuriy

Reputation: 781

Sample time for every channel can be calculated from ADC CLK as described in section "Channel-by-channel programmable sample time" of reference manual:

ADC samples the input voltage for a number of ADC_CLK cycles which can be modified us- ing the SMP[2:0] bits in the ADC_SMPR1 and ADC_SMPR2 registers. Each channel can be sampled with a different sample time. The total conversion time is calculated as follows: Tconv = Sampling time + 12.5 cycles Example: With an ADCCLK = 14 MHz and a sampling time of 1.5 cycles: Tconv = 1.5 + 12.5 = 14 cycles = 1 μs

In scan mode sampling rate for one ADC is:

1/(summ of Tconv for every enabled channel)

To set "particular" sample time you can use external trigger conversion with timer update event as trigger.

Upvotes: 1

Guillaume Michel
Guillaume Michel

Reputation: 1204

You haven't provided enough information to give an exact number. But here what you should know. You have selected the sampling time to be 71.5 ADC clock cycles. The ADC clock is generated by PCLK2 via the ADC prescaler. The ADC prescaler is in the RCC_CFGR register. For example, if PCLK2 is 72MHz and ADC prescaler is 6, ADC clock is 12MHz. And the sampling time is 71.5 cycles which translates to 71.5/12 ~ 6us

Upvotes: 5

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