Reputation: 109
Is the stmfd instruction seen as a single instruction, and so does it mean that it's going to be fully executed before dealing with the IRQ? Or is it seen as multiple instructions and so does it mean that we're going to deal with the IRQ and finish the stmfd instruction after?
Upvotes: 3
Views: 138
Reputation: 8860
Exact answer depends on the exact core that you have. For example on ARM Cortex-M4 this opeation is not atomic and is interruptible. See here - http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0439b/ch03s09s01.html
The processor implements the Interruptible-continuable Instruction field. Load multiple (LDM) operations and store multiple (STM) operations are interruptible. The ICI field of the EPSR holds the information required to continue the load or store multiple from the point where the interrupt occurred. This means that software must not use load-multiple or store-multiple instructions to access a device or memory region that is read-sensitive or sensitive to repeated writes. The software must not use these instructions in any case where repeated reads or writes might cause inconsistent results or unwanted side-effects.
You should look for the same chapter in the documentation for the ARM core you have.
Upvotes: 3