CODEWITHSUNDEEP
riscv
daveW
daveW

Reputation: 601

List of RISCV architectures supported for spike?

What are the legal fields to enter for the RISCV spike command option "--isa=". I quickly searched the spike source code and only found the DEFAULT_ISA define.

Upvotes: 1

Views: 278

Answers (1)

fsasm
fsasm

Reputation: 541

The code of spike is pretty nice to read and not very complicated. In the main procedure the argument for the isa-option is stored in the variable isa. This is passed to the constructor of sim_t, from there to the constructor of processor_t and there it is parsed in the function parse_isa_string.

If the string for isa is empty the extensions imafdc are enabled and the processor is in 64 bit mode. A non-empty string can just be the letter code of the extensions, e.g. imac, or it can have the prefix rv with an optional register width of the processor, e.g. rv32gc.

Upvotes: 2

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