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mipscpu-architectureinstruction-setopcodeinstruction-encoding
Daidamai
Daidamai

Reputation: 51

Why are 'opcode' field and 'funct' field apart in MIPS?

MIPS ISA has an R type instruction, and the R instruction has an opcode field at its first 6 bits and a funct field at its last 6 bits. So why are the ISA designed like this? How about combine them into a 12-bits field?

Upvotes: 4

Views: 4258

Answers (2)

gcc17
gcc17

Reputation: 91

MIPS instruction format

My idea is that the three kinds of instructions share a prefix of 6-bit opcode. And for R and I types, the next 5 bits decide source register. If we combine opcode and funct for R instruction, the instruction format is not so consistent between R and I, which may make processor's design complex.

Upvotes: 3

user7583029
user7583029

Reputation:

How about if combine them in 12-bits filed?

Since the opcode is the same for some operation in MIPS and if you change the funct than you can't differentiate which operation the instruction does, for example consider the following add(R,0,32) add has opcode 0 and funct 32
And also consider that and(R,0,36) and has also opcode 0 but different funct in this case 36 which means it's and AND operation.

check the MIPS Reference Sheet.

Upvotes: 1

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