stbtrax
stbtrax

Reputation: 205

Is it possible to test whether a C define is declared in a gnu Makefile?

I want to include different directories in my build based on whether a #define is declared in a .h file in my project. Is this possible or am I going about this completely wrong?

Upvotes: 0

Views: 99

Answers (3)

Jack Kelly
Jack Kelly

Reputation: 18667

The other answers have explained why this is a bad idea. Nonetheless, one way to do it is by preprocessing a makefile fragment:

In foo.mk.in:

#ifdef FOO
FOO_DEFINED := y
#else
FOO_DEFINED := n
#endif

In Makefile:

foo.mk: foo.mk.in
    $(CPP) $(CPPFLAGS) -o $@ $<
include foo.mk
ifeq ($(FOO_DEFINED),y)
$(warning FOO is defined)
else
$(warning FOO is not defined)
endif

Upvotes: 4

nmichaels
nmichaels

Reputation: 50951

It is possible, but you are going about this the wrong way. The way to include different directories is with different make targets. If your code has to know about them, use -D in your compiler switches. Alternatively, if your build needs to be able to run on other people's systems, something like autoconf is the way to go.

Upvotes: 1

Šimon T&#243;th
Šimon T&#243;th

Reputation: 36433

Yes you are. The build system is supposed to configure the code, not vice-versa. You should use a configure script for this kind of options (or probably switch to a higher build system: autotools, CMake, QMake...).

Upvotes: 4

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