CODEWITHSUNDEEP
linux-kernel
triple fault
triple fault

Reputation: 14098

Kernel stack for a user process | Linux kernel

As per my understanding there is a separate kernel stack for each user process.

How this kernel stack is used, why can't we just use one stack for all the user processes? How this helps us with preemption? When the kernel runs in interrupt context, what stack is used?

[EDIT: The architecture of interest is x86]

Upvotes: 0

Views: 640

Answers (1)

Alex Hoppus
Alex Hoppus

Reputation: 3935

How this kernel stack is used

It is used for example when usermode process enters kernel through syscall. In syscall handler inside kernel you will use kernel stack for local variables.

why can't we just use one stack for all the user processes?

But how? How they will use it simultaneously on SMP systems? This will lead to data corruptions.

How this helps us with preemption?

I'am not sure what are you asking about. Basically it relates to preemption very indirectly. If you was interrupted by system timer you probably will switch to different thread with different kernel stack. The context may be saved on the top of that stack (I'am not sure if linux implements it the same way). Also there is a preempt_counter thing in linux, which placed on the top of kernel stack. This variable could be incremented/decremented by preempt_disable(enable). What means that kernel thread preemption switched off/on. It is widely used f.e. by spinlocks.

When the kernel runs in interrupt context, what stack is used?

When we go from user -> kernel in this case the following is happens:

  1. The kernel stack is used. The processor switches to this stack defined by the SS0 and ESP0 fields of the TSS.

  2. The processor pushes the exception parameters on the kernel stack

             +--------------------+ KSTACKTOP             
         | 0x00000 | old SS   |     " - 4
         |      old ESP       |     " - 8
         |     old EFLAGS     |     " - 12
         | 0x00000 | old CS   |     " - 16
         |      old EIP       |     " - 20 <---- ESP 
         +--------------------+

  3. The processor reads IDT entry N (depending on which IRQ or exception occured) and sets CS:EIP to point to the handler function described by the entry.

  4. The handler function takes control and handles the exception.

Source: https://pdos.csail.mit.edu/6.828/2016/labs/lab3/

Upvotes: 3

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