CODEWITHSUNDEEP
linuxlinux-kernelxilinxdevice-treevivado
Leos313
Leos313

Reputation: 5627

macb ff0e0000.ethernet eth0: Could not attach to PHY

Booting a Linux-based OS upon a Zynq Ultrascale+ (board ZCU102 rev 1) and configuring the kernel as described in here, having a device tree automatically generated by Vivado SDK 2017.2 and shown following:

    gem0: ethernet@ff0b0000 {
        compatible = "cdns,zynqmp-gem";
        status = "disabled";
        interrupt-parent = <0x4>;
        interrupts = <0x0 0x39 0x4 0x0 0x39 0x4>;
        reg = <0x0 0xff0b0000 0x0 0x1000>;
        clock-names = "pclk", "tx_clk", "hclk";
        #address-cells = <0x1>;
        #size-cells = <0x0>;
        #stream-id-cells = <0x1>;
        iommus = <0x8 0x874>;
        power-domains = <0xd>;
        clocks = <0x3 0x2d 0x3 0x2d 0x3 0x31>;
    };

    gem1: ethernet@ff0c0000 {
        compatible = "cdns,zynqmp-gem";
        status = "disabled";
        interrupt-parent = <0x4>;
        interrupts = <0x0 0x3b 0x4 0x0 0x3b 0x4>;
        reg = <0x0 0xff0c0000 0x0 0x1000>;
        clock-names = "pclk", "tx_clk", "hclk";
        #address-cells = <0x1>;
        #size-cells = <0x0>;
        #stream-id-cells = <0x1>;
        iommus = <0x8 0x875>;
        power-domains = <0xe>;
        clocks = <0x3 0x2e 0x3 0x2e 0x3 0x32>;
    };

    gem2: ethernet@ff0d0000 {
        compatible = "cdns,zynqmp-gem";
        status = "disabled";
        interrupt-parent = <0x4>;
        interrupts = <0x0 0x3d 0x4 0x0 0x3d 0x4>;
        reg = <0x0 0xff0d0000 0x0 0x1000>;
        clock-names = "pclk", "tx_clk", "hclk";
        #address-cells = <0x1>;
        #size-cells = <0x0>;
        #stream-id-cells = <0x1>;
        iommus = <0x8 0x876>;
        power-domains = <0xf>;
        clocks = <0x3 0x2f 0x3 0x2f 0x3 0x33>;
    };

    gem3: ethernet@ff0e0000 {
        compatible = "cdns,zynqmp-gem";
        status = "okay";
        interrupt-parent = <0x4>;
        interrupts = <0x0 0x3f 0x4 0x0 0x3f 0x4>;
        reg = <0x0 0xff0e0000 0x0 0x1000>;
        clock-names = "pclk", "hclk", "tx_clk", "rx_clk";
        #address-cells = <0x1>;
        #size-cells = <0x0>;
        #stream-id-cells = <0x1>;
        iommus = <0x8 0x877>;
        power-domains = <0x10>;
        clocks = <0x3 0x1f 0x3 0x34 0x3 0x30 0x3 0x34>;
        phy-mode = "rgmii-id";
        xlnx,ptp-enet-clock = <0x0>;
    };

When booting, one of the kernel message is:

macb ff0e0000.ethernet eth0: Could not attach to PHY

and, if you execute:

ifconfig -a

the shell prompts:

root@linaro-developer:~# ifconfig -a
can0: flags=128<NOARP>  mtu 16
        unspec 00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00  txqueuelen 10  (UNSPEC)
        RX packets 0  bytes 0 (0.0 B)
        RX errors 0  dropped 0  overruns 0  frame 0
        TX packets 0  bytes 0 (0.0 B)
        TX errors 0  dropped 0 overruns 0  carrier 0  collisions 0
        device interrupt 11  

lo: flags=73<UP,LOOPBACK,RUNNING>  mtu 65536
        inet 127.0.0.1  netmask 255.0.0.0
        inet6 ::1  prefixlen 128  scopeid 0x10<host>
        loop  txqueuelen 1  (Local Loopback)
        RX packets 6  bytes 372 (372.0 B)
        RX errors 0  dropped 0  overruns 0  frame 0
        TX packets 6  bytes 372 (372.0 B)
        TX errors 0  dropped 0 overruns 0  carrier 0  collisions 0

sit0: flags=128<NOARP>  mtu 1480
        sit  txqueuelen 1  (IPv6-in-IPv4)
        RX packets 0  bytes 0 (0.0 B)
        RX errors 0  dropped 0  overruns 0  frame 0
        TX packets 0  bytes 0 (0.0 B)
        TX errors 0  dropped 0 overruns 0  carrier 0  collisions 0

No eth is present. Suggestions on how to solve that problem?

Upvotes: 1

Views: 4867

Answers (1)

Leos313
Leos313

Reputation: 5627

SOLUTION FOUND:

it is necessary to add in the system-top.dts (automatically generated by Vivado) the file "zcu102-revb.dtsi" in this way:

/*
 * CAUTION: This file is automatically generated by Xilinx.
 * Version:  
 * Today is: Wed Sep 13 12:25:12 2017
*/


/dts-v1/;
/include/ "zynqmp.dtsi"
/include/ "zynqmp-clk-ccf.dtsi"
/include/ "zcu102-revb.dtsi"
/include/ "pl.dtsi"
/include/ "pcw.dtsi"

....etc....

Note that the file can be found in the "xilinx-zcu102-zu9-es2-rev1.0-2017.2" package (find it here, in the Xilinx webpage).

Also it is possible to find it in the kernel linux source files in the folder "linux-xlnx/arch/arm64/boot/dts/xilinx/".

With the new device tree generated, it is possible to use the eth0 and the kernel prompts:

macb ff0e0000.ethernet eth0: Cadence GEM rev 0x50070106 at 0xff0e0000 irq 31 (00:0a:35:03:77:52)

Also I have just posted the answer in the Xilinx forum.

Upvotes: 2

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