CODEWITHSUNDEEP
assemblymips
Aryéh Radlé
Aryéh Radlé

Reputation: 1332

Accessing code segment memory using SW and LW in MIPS

Is it possible to access the code segment memory using the SW and LW instructions in MIPS, given the address of the instructions?

For example:

0x1000: ADDI $s1, $zero, 0x1000
0x1004: LW $s2, 4($s1)

What would the code load into $s2? 0x0000 (given the data segment is empty) or binary representation of the instruction at 0x1004?

EDIT:

AFAIK, pipelining in MIPS processor is possible due to separation of the instructions memory and the data memory - correct me if I'm wrong.

EDIT 2:

I've found a question, the answer to which implies that the instructions can be accessed and modified using LW and SW. Thus the answer is $s2 will contain the binary representation of the instruction at 0x1004.

Upvotes: 0

Views: 1774

Answers (2)

Peter Cordes
Peter Cordes

Reputation: 364039

You will load the machine encoding of the instruction at address 0x1004.

MIPS has a flat memory model; different segments of an executable are mapped / loaded into different parts of a single flat memory address space; it's a Von Neumann architecture where code bytes and instruction bytes are the same thing, and share the same address space.

Code addresses use the same address-space as data addresses. Martin's answer suggests it may be possible to create a MIPS where at least the permissions are different, and of course an embedded MIPS with its code in ROM couldn't modify its instructions with stores. But even then code and data would have to be mapped into different parts of the same physical address space, even if stores to code addresses faulted. Possibly you could build a MIPS where even loads of code addresses faulted, but that's unlikely. Jumps to data addresses might also fault if you disabled execute permission on that region / page.

On a normal MIPS with its instruction in RAM, self-modifying code is possible if you have write+exec permissions configured. (But note that for correctness you would usually need to flush i-cache, which the code in that Q&A isn't doing.)

And BTW, .data in the asm source really means the .data section, which the linker eventually links into the data segment of the executable. See What's the difference of section and segment in ELF file format.

The most important point here is that segments of an executable aren't the same thing as x86-style segmented memory. (The terminology has a similar origin, though).

Upvotes: 1

Martin Rosenau
Martin Rosenau

Reputation: 18493

Depends on what you mean with "MIPS":

  • A real MIPS CPU like you find them in some WLAN routers?

  • Some MIPS emulator like SPIM or MARS?

In the case of a real MIPS CPU it depends how the memory management unit is configured:

If the memory management unit allows read access to the code segment you will indeed get the binary representation of the instruction at address 0x1004.

(By the way: You would need to use addi $s1, $0, 0x1004 to ensure $s1 really contains 0x1004 because $s1 could contain another value than 0.)

If the memory management unit does not allow access to the code segment the program will crash. (Most MIPS CPUs seem not to allow this setting.)

If you use some emulator like SPIM, MARS (or any other one) it depends on how the emulator is working...

Theoretically there could be three types of emulators:

  • Some which crash
  • Some which read the binary representation
  • Some which read some "stupid" value

Upvotes: 0

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