CODEWITHSUNDEEP
gccassemblymips
TheNetAdmin
TheNetAdmin

Reputation: 41

How to tell gcc not to generate particular instructions

I am using gcc to compile a set of c codes. And my question is: can I tell gcc not to generate some specific instructions?

e.g. I don't want gcc to generate MUL instruction, how should I do?

I'm working on self implemented MIPS cpu and related codes, and for some reasons, I don't want gcc to generate some weird instructions that I've not implemented. It seems that I need to hack the gcc a little bit.

Upvotes: 4

Views: 1727

Answers (1)

minghua
minghua

Reputation: 6583

Based on Krister Walfridsson's blog, the way to do it could be:

  • Add an command line option to the machine.opt file, so to create a global variable.
  • Find the instruction node in machine.md or other files, that emits the instruction you want to disable. Change the condition to be on the new variable you'v added. When the condition is not met, gcc would emit a call to a function that you'll supply in your .c file or lib file.

As a simpler example, take a look at the ft32 architecture directory. It creates an global variable NODIV based on a -mnodiv command line option. The instruction node in the ft32.md file contains: 

(define_insn "divsi3"
  [(set (match_operand:SI 0 "register_operand" "=r,r")
          (div:SI
           (match_operand:SI 1 "register_operand" "r,r")
           (match_operand:SI 2 "ft32_rimm_operand" "r,KA")))]
  "!TARGET_NODIV"
  "div.l  %0,%1,%2")

In this ft32 case, when the variable is not set, gcc emits div.l assembly code. When it is set, it would make a call to a function named __divsi3.

Though I have not tried this out. Will update with exact information when I get a chance to try it out.

Upvotes: 1

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