Reputation: 131
I am programming a TI TMS320F28379D microcontroller. I need to write a delay function where the time unit is CPU cycle. Texas Instruments provides such a delay function already implemented in assembly. Here it is:
_F28x_usDelay:
SUB ACC, #1
BF _F28x_usDelay, GEQ
LRETR
Usually I code in C and C++, and I have only a basic understanding of assembly. This function is quite simple. The first instruction subtracts 1 from the accumulator register, then the branching instruction BF is used to loop again and again while the value stored in the accumulator is greater or equal to 0. LRETR is just a returning instruction.
Now, one has to know how many CPU cycles are needed for each loop. The TI code comes with the following documentation:
There is a 9/10 cycle overhead and each loop takes five cycles. The loop count is given by the following formula: DELAY_CPU_CYCLES = 9 + 5*LoopCount
I do not understand what is the "9/10 cycle overhead" and why one as to add 9 to get DELAY_CPU_CYCLES. Could anyone explain this to me? Thank you.
Upvotes: 0
Views: 735
Reputation: 7057
This link describes what overhead generally means in this context.
In this example the overhead is the cycles not included in the loop, which are the cycles used to call and return from the function. According to the documented equation it takes 5 cycles to execute a single iteration of the loop and it takes 9 cycles of overhead simply to call and return from the function. For example, the LRETR instruction is not part of the loop and it is part of the overhead.
Perhaps "9/10" in the description means "9 or 10". Perhaps the overhead of calling and returning from the function takes 9 or 10 cycles depending on where it is called from or pipeline issues.
Upvotes: 1