CODEWITHSUNDEEP
boolean-logicboolean-expressionboolean-operations
J Alan
J Alan

Reputation: 77

Build x XOR (y XOR z) with NAND port

I need to make x xor(y xor z) with only NAND ports. Notation: NOT(y) = ~y.

My first steps were to identify the output of that stuff, so:

x xor(y xor z) = x xor (y~z + ~yz) = ~x(y~z + ~yz) + x~(y~z + ~yz) = ~xy~z + ~x~yz + x~y~z + xyz

So the final output of my NAND construction should be: ~xy~z + ~x~yz + x~y~z + xyz

I tried to attack this by first making y XOR z:

y XOR z = y~z + ~yz = NAND[NAND(y,NAND(z,z)),NAND(z,NAND(y,y))]

Since

NAND(y,NAND(z,z)) = NOT(y * NOT(z*z)) = NOT(y) + z which I'll call g1 and

NAND(z,NAND(y,y)) = NOT(z * NOT(y*y)) = NOT(z) + y as g2

then the outside NAND[g1,g2] = z~y + y~z.

So now I have a XOR with just NANDs and doing the x xor (y xor z) should be just matter of treating (y xor z) as a single variable which gives me:

x xor (y xor z) = NAND[NAND(x,NAND(NAND[NAND(y,NAND(z,z)),NAND(z,NAND(y,y))],NAND[NAND(y,NAND(z,z)),NAND(z,NAND(y,y))])),NAND(NAND[NAND(y,NAND(z,z)),NAND(z,NAND(y,y))],NAND(x,x))]

Am I correct? I feel like the xor could be made in a more efficient way than using 5 NANDs ports.

Thanks guys.

Upvotes: 0

Views: 3473

Answers (1)

Axel Kemper
Axel Kemper

Reputation: 11322

Your final expression is correct.

The 20 NAND gates can be reduced to eight:

enter image description here

This circuit makes use of XOR(x,y,z) = XOR(XOR(x,y),z). It is a combination of two two-input XOR gates, each of them composed of four NAND gates.

Upvotes: 1

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