benathon
benathon

Reputation: 7653

Makefile target from variable overrides unexpected target

I would like to create make a target by prefixing bootload_ onto a list variable in Make. Here is my file:

cs00:
    echo "in original target cs00"
cs01:
    echo "in original target cs01"

BOOTLOAD_ENABLED:=cs00 cs01

bootload_$(BOOTLOAD_ENABLED):
    echo "in bootload $@"

When I run make bootload_cs00 I get this output:

Makefile:9: warning: overriding recipe for target 'cs01'
Makefile:4: warning: ignoring old recipe for target 'cs01'
echo "in bootload bootload_cs00"
in bootload bootload_cs00

I don't understand why this is overriding the original target? What am I missing here.

Upvotes: 0

Views: 57

Answers (1)

Maxim Egorushkin
Maxim Egorushkin

Reputation: 136495

bootload_$(BOOTLOAD_ENABLED) expands to bootload_cs00 cs01, i.e. it is just string concatenation.

You can prefix all words in a variable with patsubst, addprefix, or substitution references. E.g.:

BOOTLOAD_ENABLED:=cs00 cs01
$(info $(addprefix bootload_,${BOOTLOAD_ENABLED}))
$(info $(patsubst %,bootload_%,${BOOTLOAD_ENABLED}))
$(info ${BOOTLOAD_ENABLED:%=bootload_%})

They all print same bootload_cs00 bootload_cs01 string.

See Functions for Transforming Text for full details.

Upvotes: 1

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