CODEWITHSUNDEEP
makefile
Fisher
Fisher

Reputation: 422

Why a makefile target is always run?

Makefile:

OUTPUT_ILA = "path/file" 

all: syn ila opt ...

$(OUTPUT_SYN): $(INPUT_SYN)
   @echo "syn"
   ...

$(OUTPUT_ILA): $(OUTPUT_SYN)
   @echo "ila"
   ...

$(OUTPUT_OPT): $(INPUT_OPT)
   @echo "opt"
   ...

syn: $(OUTPUT_SYN)
ila: $(OUTPUT_ILA)
opt: $(OUTPUT_OPT)
...

Don't understand why step ila is always run. When $(OUTPUT_SYN) is unchanged and ila run before, make still runs ila step.
The expected behavior is ila to only run when, in the first step, $(OUTPUT_SYN) is changed. If $(OUTPUT_SYN) is unchanged, it shall skip ila and run opt.
How to debug and fix this?

Upvotes: 1

Views: 2695

Answers (1)

MadScientist
MadScientist

Reputation: 101081

Since you don't provide any information about what the value of the variables are, or the what the recipes do, there's little we can tell you about why.

However, note that if the target of a recipe does not exist then the recipe is always run (it has to be, since make cannot determine if it's out of date or not). So, if your recipe for the $(OUTPUT_ILA) target does not create the file named by the variable OUTPUT_ILA (whatever that expands to) then this recipe will always be run.

Put another way, you should make sure that the recipe updates the file specified by the automatic variable $@, if you want it to work properly.

Upvotes: 2

Related Questions