CODEWITHSUNDEEP
assemblyarmcortex-mtexas-instruments
mjet
mjet

Reputation: 33

anybody knows why LDR r0,[r1, r2]! not working properly? (in thumb-2)

For example, LDR r0,[r1, #4]!, r1 value will be changed to r1+4 then load value to r0, however, when I tried to use LDR r0,[r1, r2]!, r1 didn't changed.

I'm working with TM4C123GH6PGE and CCS 5.4

Upvotes: 2

Views: 2237

Answers (2)

Peter Cordes
Peter Cordes

Reputation: 364811

Use a better assembler that doesn't silently distort your code when you try to assemble something that's not encodeable. Or if it did print a warning message, don't ignore warnings!

.syntax unified
.thumb
LDR r0,[r1, #4]!
LDR r0,[r1, r2]!
LDR r0,[r1, r2]

assembled with arm-none-eabi-as -mthumb -mcpu=cortex-m4 arm.S: GAS says arm.S:4: Error: Thumb does not support register indexing with writeback -- 'ldr r0,[r1,r2]!' instead of assembling it into ldr r0,[r1, r2] or something.

(Cortex-M4 supports the entire Thumb2 instruction set, and gas knows this. I don't think there's a way to directly enable Thumb2 with any option with a name that includes thumb2, only with -mthumb or .thumb and a -mcpu=CPU or -march that supports Thumb2.)

It assembles fine in ARM mode, where LDR r0,[r1, r2]! is encodeable:

   0:   e5b10004        ldr     r0, [r1, #4]!
   4:   e7b10002        ldr     r0, [r1, r2]!
   8:   e7910002        ldr     r0, [r1, r2]

Upvotes: 6

Johan
Johan

Reputation: 3881

According to the architecture reference manual write back is not supported when using a register as offset.

Upvotes: 6

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