Reputation: 4517
I am using a custom i.MX6 Board and I am configuring pin multiplexing in device tree.
Can anyone tell me how this value is calculated
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
Same GPIO is configured in different ways in different dtsi
MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x80000000
MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x030b0
What I know is that we configuring the PAD SDA1_DAT2 to GPIO1_IO19 mode.. But why is the value different..
Thanks for your time
Upvotes: 1
Views: 586
Reputation: 2211
To understand what the value actually means, you have to refer to the IMX6Q reference manual chapter 36.4.457 Pad Control Register (IOMUXC_SW_PAD_CTL_PAD_SD1_DATA2).
You can also have a look at the kernel source documentation https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/fsl%2Cimx-pinctrl.txt for more general information about the device tree source.
This value is used to control the PAD (hysteresis, pull up , ..).
For example, if you want to enable hysteresis, you have to set the 16th bit of the register, and if you want open drain, then set the 11th bit.
In your case, you want to hog the SD1_DAT2 Pad to Signal GPIO1_IO19 and set the Pad control register value to 0x8000000 ( or 0x30b0 but you must set what is more convenient for you).
Upvotes: 1