CODEWITHSUNDEEP
makefile
K. Shores
K. Shores

Reputation: 1005

Makefile does not call shell script when setting variable

I am trying to follow the meaty skeleton tutorial on osdev. The Makefile is not running one of the shell scripts. I have set all of the permissions on each of the files to be executable.

In lib/Makefile, I have the below few lines set:

$(info DEFAULT_HOST!=../default-host.sh)
$(info HOST?=DEFAULT_HOST)
$(info HOSTARCH!=../target-triplet-to-arch.sh $(HOST))

after these lines have executed, neither DEFAULT_HOST nor HOSTARCH get set.

default-host.sh:

#!/bin/sh
echo i686-elf

arget-triplet-to-arch.sh:

#!/bin/sh
if echo "$1" | grep -Eq 'i[[:digit:]]86-'; then
  touch here.txt
  echo i386
else
  touch there.txt
  echo "$1" | grep -Eo '^[[:alnum:]_]*'
fi

Note, I added the touch statements in arget-triplet-to-arch.sh. When run from the shell, one or other of those files is created, but not when the Makefile is run. This means that make seems to not be running the shell commands. How can I get make to run the shell commands?

Upvotes: 0

Views: 404

Answers (1)

MadScientist
MadScientist

Reputation: 100926

As Beta says, info doesn't "allow you to see the value of that line being evaluated". info expands its argument then prints it to stdout. "Expands" means it resolves any variable references, it doesn't mean interpreting it as a makefile command. So if you run $(info hi) it prints "hi". If you run $(info foo = bar) if prints foo = bar but does not set the value of the variable foo to bar.

For using !=, note that this feature was added to GNU make 4.0. If your version is older than that then this assignment doesn't do what you expect. In particular, a line like FOO!=echo bar will be interpreted as if it were FOO! = echo bar... in other words it sets the make variable named FOO!.

Personally I always put whitespace around the assignment statements in my makefiles... this makes it clear that they are make assignments, not shell variable assignments (not that it shouldn't be clear anyway for anyone who knows makefile syntax, but...). In newer versions of GNU make, variable names cannot contain whitespace.

Upvotes: 1

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