CODEWITHSUNDEEP
c++linuxmakefile
Sat
Sat

Reputation: 171

Writing Makefile for simple src, include, libs folders project

I was writing a simple Makefile which will iterate thru .cpp files from ./src folder and include files from ./include folder. But getting "no input files" error. Could you please help me out for setting up.

I have below directory structure

./src     => It has main source file - Application.cpp and other applicationclass files like MyClass.cpp, Adapter.cpp. ...
./include => Include i.e. .h files, which has declarations.
./obj     => Where i am expecting to drop .o files
./bin     => Directory where i am expecting to drop executable

I tried with below Makefile but its giving me "no input files" error. I am using some third party libraries which has include files which are sub folders inside "include" folder.

appname := Application

CXX := g++
CXXFLAGS := -Wall -g

srcfiles := $(shell find . -maxdepth 1 -name "*.cpp")

objects  := $(patsubst %.cpp, %.o, $(srcfiles))

all: $(appname)
    $(appname): $(objects)
    $(CXX) $(CXXFLAGS) $(LDFLAGS) -o $(appname) $(objects) $(LDLIBS)

depend: .depend

.depend: $(srcfiles)
    rm -f ./.depend
    $(CXX) $(CXXFLAGS) -MM $^>>./.depend;

clean:
    rm -f $(objects)

dist-clean: clean
    rm -f *~ .depend

include .depend

Let me know what I am doing wrong or better way to compile this project. Thank you for any help in this matter.

Upvotes: 3

Views: 1404

Answers (1)

lubgr
lubgr

Reputation: 38267

The directory is structure you outlined isn't well integrated into your makefile. Assuming that the makefile is in the top level directory, the line

srcfiles := $(shell find . -maxdepth 1 -name "*.cpp")

doesn't find any files because of -maxdepth 1. A better approach is to use the builtin function

srcfiles := $(wildcard src/*.cpp)

Second,

appname := Application

is later passed to the compiler as the -o argument. But as you said you want the binary to be in the bin directory, this should be adjusted to bin/Application. Finally,

all: $(appname)
    $(appname): $(objects)
    $(CXX) $(CXXFLAGS) $(LDFLAGS) -o $(appname) $(objects) $(LDLIBS)

isn't well indented. You want an this:

all: $(appname)

$(appname): $(objects)
    $(CXX) $(CXXFLAGS) $(LDFLAGS) -o $(appname) $(objects) $(LDLIBS)

and also make sure, that indentation are true tabs, not spaces. One additional note: you can generate the .d files containing header dependency information on the fly when passing -MMD to g++. This way, no separate rule/build step is required. Just make sure you -include .depend before the rule for building the object files.

Upvotes: 1

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