CODEWITHSUNDEEP
cmakefilecompilation
CodeKiwi
CodeKiwi

Reputation: 71

Compiling using Makefile: how to do it right for several programs?

I'm learning how to compile using Makefile. I think I've understood the aim of that "tool" but I am facing a problem. I am working on a project and need to compile several programs with the same Makefile. My programs are based on the same exercice, but they have to display different things, this is the reason why I need five different "output programs". But they use the same functions, the same main.c file, etc. I would like to find the best way of compiling, without compiling five times the files that are common to my programs. I hope my sentence was understandable... Here is my Makefile:

NAME0 = colle-00
NAME1 = colle-01
NAME2 = colle-02
NAME3 = colle-03
NAME4 = colle-04

SRC0 = srcs/colle_00.c
SRC1 = srcs/colle_01.c
SRC2 = srcs/colle_02.c
SRC3 = srcs/colle_03.c
SRC4 = srcs/colle_04.c

OBJ0 = colle_00.o
OBJ1 = colle_01.o
OBJ2 = colle_02.o
OBJ3 = colle_03.o
OBJ4 = colle_04.o

HDR = includes/my.h

SRCALL = srcs/ft_atoi.c \
     srcs/ft_putchar.c \
     srcs/main.c \
     srcs/ft_print_line.c

SRCALLO = ft_atoi.o \
      ft_putchar.o \
      main.o \
      ft_print_line.o

FLAGS = -Wall -Werror -Wextra

all: $(NAME0) $(NAME1) $(NAME2) $(NAME3) $(NAME4)

$(NAME0):
    cc $(FLAGS) -I $(HDR) -c $(SRC0) $(SRCALL)
    cc $(OBJ0) $(SRCALLO) -o $(NAME0)
$(NAME1):
    cc $(FLAGS) -I $(HDR) -c $(SRC1) $(SRCALL)
    cc $(OBJ1) $(SRCALLO) -o $(NAME1)
$(NAME2):
    cc $(FLAGS) -I $(HDR) -c $(SRC2) $(SRCALL)
    cc $(OBJ2) $(SRCALLO) -o $(NAME2)
$(NAME3):
    cc $(FLAGS) -I $(HDR) -c $(SRC3) $(SRCALL)
    cc $(OBJ3) $(SRCALLO) -o $(NAME3)
$(NAME4):
    cc $(FLAGS) -I $(HDR) -c $(SRC4) $(SRCALL)
    cc $(OBJ4) $(SRCALLO) -o $(NAME4)

clean:
    rm -f *.o

fclean: clean
    rm -f $(NAME0) $(NAME1) $(NAME2) $(NAME3) $(NAME4)

re: fclean all

I think I have a relink problem, but I have difficulties to understand how to fix it... I think the interest could be to compile the .c files only if they have been modified since the creation of the corresponding .o file, but I am not sure that this is the idea hidden behind "avoiding the relink".

Thank you very much for the time spent on my questions!

Upvotes: 0

Views: 63

Answers (1)

yzabalotski
yzabalotski

Reputation: 66

I think, you can simply do:

$(NAME0): $(SRCALLO)
    cc $(FLAGS) -I $(HDR) -c $(SRC0)
    cc $(OBJ0) $(SRCALLO) -o $(NAME0)
$(%.o):$(%.c)

"%.o:%.c" patter substitution for generating object files. Note, that object files will not be regenerated if header file is changed. So, to achieve such behavior you can check How can I have a Makefile automatically rebuild source files that include a modified header file? (In C/C++).

Upvotes: 1

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