Reputation: 23
I'm trying to know, how IRQs map to a special Interrupt Descriptor Table (IDT) entry from PIC perspective. The link here describes how to disable all the IRQs by setting 0xff
as the Interrupt Mask Register by using 0x21
and 0xA1
bus lines.
As I know keyboard generates an IRQ1 interrupt so if I want to disable every IRQ1 from receiving by CPU, I should set the First (Second) bit to 1.
I created the following Linux Kernel Module :
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/preempt.h>
int __init hello_start(void)
{
asm volatile(
"in $0x21,%al\n\t"
"or $0x2, %al\n\t"
"out %al, $0x21\n\t"
);
return 0;
}
static void __exit hello_end(void)
{
}
module_init(hello_start);
module_exit(hello_end);
After running the above code, it doesn't disable my keyboard. I also set %al
to 0xff
to disable all of the interrupts but it still won't work.
So I have the following questions :
offset
that is used in (e.g Linux) to choose the offset+IRQ Number
entry from IDT?For the 3rd question, by offset I mean :
When a key is pressed, the keyboard gives a signal to the PIC along its interrupt line IRQ1. The PIC has an offset value stored during initialization of the PIC. It adds the input line number to this offset to form the Interrupt number. Then the processor looks up a certain data structure called the Interrupt Descriptor Table (IDT) to give the interrupt handler address corresponding to the interrupt number.
Upvotes: 0
Views: 398