CODEWITHSUNDEEP
embedded-linuxinterruptpci-e
laplace11235
laplace11235

Reputation: 41

PCIe PIC_INTERRUPT_PIN (0x3c) is 0

I write my pcie driver for a custom board. I am going to use an interrupt. 

if(request_irq(dev->irq, pci_dma_irq, IRQF_SHARED | IRQF_TRIGGER_HIGH, 
            "PCIe sol_dma", dev)){
    unit_err("request irq %d\n", dev->irq);
   ret = 1;
}

# cat /proc/interrutps

           CPU0       CPU1       
 16:          0          0   OpenPIC    16 Level     [EDAC] L2 err
 19:          2          0   OpenPIC    19 Level     fsl-lbc
 20:          0          0   OpenPIC    20 Level     fsldma-chan
 21:          0          0   OpenPIC    21 Level     fsldma-chan
 22:          0          0   OpenPIC    22 Level     fsldma-chan
 23:          0          0   OpenPIC    23 Level     fsldma-chan
 24:          0          0   OpenPIC    24 Level     [PCI] PME, PCIe PME, [EDAC] PCI err
 25:          0          0   OpenPIC     8 Level     PCIe sol_dma
 26:    4174986          0   OpenPIC     3 Level     phy_interrupt
 29:          0          0   OpenPIC    29 Level     eth0_g0_tx   
 30:          0         32   OpenPIC    30 Level     eth0_g0_rx
 34:          0          0   OpenPIC    34 Level     eth0_g0_er

The interrupt handler doesn't be called. Register PCI_INTERRUPT_LINE (0x3c) is 0. In ORELLY chapter 12

By the time Linux boots, the computer’s firmware has already assigned a unique interrupt number to the device, and the driver just needs to use it. The interrupt number is stored in configu- ration register 60 ( PCI_INTERRUPT_LINE ), which is one byte wide.

But I doesn't have any BIOS, only u-boot and dts. How can I set PCI_INTERRUPT_LINE register in the boot time?

Upvotes: 0

Views: 216

Answers (2)

laplace11235
laplace11235

Reputation: 41

The problem was in dtb. Interrupt-map of pci interface for my processor had an incorrect value for mapping. I corrected it as in documentation. It works now.

Upvotes: 0

prl
prl

Reputation: 12455

You don’t need to set that. It has no effect on the device. It is an old way for the BIOS to let the OS driver know how it configured the interrupt.

Upvotes: 1

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