parisa
parisa

Reputation: 842

Measuring TLB Miss Penalty for intel processos with PCM tool

I'm trying to measure the TLB(Translation Look Aside Buffer) miss penalty on X86-64. Specifically miss penalty of the second level unified TLB which is the cost of TLB walk.

I have been looking into Intel pcm tool but haven't been able to figure out how to use it for this purpose. Following is the code I'm using to get performance counters by PCM libraries:

      #include "cpucounters.h"        // Intell PCM monitoring tool

    int main() {
       PCM * m = PCM::getInstance();
       PCM::ErrorCode returnResult = m->program();
       if (returnResult != PCM::Success){
          std::cerr << "Intel's PCM couldn't start" << std::endl;
          std::cerr << "Error code: " << returnResult << std::endl;
          exit(1);
       }



       SystemCounterState before_sstate = getSystemCounterState();


//  CODE TO MEASURE TLB MISS PENALTY 


       SystemCounterState after_sstate = getSystemCounterState();

       std::cout << "Instructions per clock:" << getIPC(before_sstate,after_sstate) << std::endl;
       std::cout << "Bytes read:" << getBytesReadFromMC(before_sstate,after_sstate) ;
    }

With this I'm able to get the IPC. But I don't know how would the test program look like in order to measure TLB miss penalty with high accuracy.

Any tips on what other tools I can use to get a quick estimation would be very helpful.

Upvotes: 1

Views: 401

Answers (1)

Luo Yongping
Luo Yongping

Reputation: 31

I saw a post on official website of intel-pcm, it said that PCM cannot add metrics like TLB miss due to its implementation mechanism:

PCM uses a free-running counters, i.e. the counters are programmed once at start-up with a fixed set of events. PCM already uses all available core counters, we can't add any additional metric like TLB misses without giving up some other metric like cache misses.

Upvotes: 1

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