Paul
Paul

Reputation: 1210

How to find out the definition of the variable MAKE

Haven't been using make for a while. But just got a project from a 10 years old compiler using Ubuntu.

I am looking at the makefile and trying to find out which compiler it is using. ${MAKE} is used in the file. But where can I find out the definition of MAKE. Thanks

Upvotes: 1

Views: 573

Answers (1)

jfMR
jfMR

Reputation: 24738

You could simply use both the info and value built-in functions inside your makefile:

$(info MAKE: $(value MAKE))

This will work if MAKE is a recursively expanded variable, which it is by default. Otherwise, if MAKE were a simply expanded variable, you will see the expansion that was done at the moment of evaluating MAKE's definition (i.e., the same as $(MAKE)).


A better approach, which is independent of the flavour of the variable, would be to run make with the option -p and look at the definition of MAKE, e.g.:

make -p | grep 'MAKE ='

You will probably find out that MAKE is defined as:

MAKE = $(MAKE_COMMAND)

and MAKE_COMMAND, which is another variable (this time, a simply expanded one), may be in turn defined as:

MAKE_COMMAND := make

Upvotes: 1

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