Reputation: 3
I want to put all the .o file in a different directory.
He can create all the .o file but he can create the .exe file
My Makefile:
CC = gcc
SRC = $(wildcard *.c)
OBJ = $(SRC:.c=.o)
EXEC = exe
CFLAGS = -Wall -pedantic -std=c11 -g
all : $(EXEC)
%.o : %.c
$(CC) -o prog/$@ -c $< $(CFLAGS)
$(EXEC) : $(OBJ)
$(CC) -o $@ prog/$^ $(CFLAGS)
clean : rm -rf *.o
mrproper : clean rm -rf $(EXEC)
And there is the result in shell (Ubuntu):
gcc -o prog/a.o -c a.c -Wall -pedantic -std=c11 -g
gcc -o prog/b.o -c b.c -Wall -pedantic -std=c11 -g
gcc -o prog/main.o -c main.c -Wall -pedantic -std=c11 -g
gcc -o exe prog/a.o b.o main.o -Wall -pedantic -std=c11 -g
gcc: error: b.o: No file or directory
gcc: error: main.o: No file or directory
Makefile:13: recipe for target 'exe' failed
make: * [exe] Error 1
PS : a.c : print A , b.c : print B et main.c use a.c and b.c
Upvotes: 0
Views: 1194
Reputation: 85887
I see two issues:
%.o
rule doesn't actually create %.o
files.prog/$^
expands to prog/a.o b.o main.o
because $(OBJ)
is a.o b.o main.o
.I'd do it like this:
Instead of OBJ = $(SRC:.c=.o)
, write
OBJ = $(SRC:%.c=prog/%.o)
The rule for object files then becomes
prog/%.o : %.c
$(CC) -o $@ -c $< $(CFLAGS)
and the executable can be created with
$(EXEC) : $(OBJ)
$(CC) -o $@ $^ $(CFLAGS)
Finally, for sanity reasons your cleanup rules should probably be
clean :
rm -rf prog/*.o
mrproper : clean
rm -rf $(EXEC)
Upvotes: 2