CODEWITHSUNDEEP
riscv
AlphaKilo
AlphaKilo

Reputation: 13

Implementation of a Command

I am a bit lost on understanding the implementation of a specific command.

In this example, there is a command passed 0x00c6ba23 which is 0000 0000 1100 0110 1011 1010 0010 0011 in binary

I am attempting to find the ALU control unit’s inputs for this instruction.

From this I can see

I am using this image to decode it

How the ALU control bits are set depends on the ALUOp control bits and the different opcodes for the R-type instruction

My question is how do I get the ALU control bits and ALUOp control bits for this function? And why is the function SD, even though the funct 3 is showing 011 instead of 111?

Upvotes: 0

Views: 1801

Answers (2)

An5Drama
An5Drama

Reputation: 567

If you want to know how the ALU control bits get encoded, you can reference this doc p4, where ALU control bits encodes the ALU operand sign and operation. (It is also referenced in COD 'FIGURE A.5.12' and 'FIGURE A.5.13').

The ALUop is just manually defined from my perspective. Then use truth table to build the hardware where generate ALUop and other signals from instruction. See this MIPS doc p12 (RISC-V implementation should be similar, because the basic hardware design method is same.)

You can also see the verilog implementation to better understand the problem (the following code is from COD risv-v ebook p675)

here LD,SD -> 00; BEQ ->01; arithmetic like add,sub -> 10;

  assign MemoryOp = (opcode == LD) || (opcode == SD);  // a memory operation
  /*
  see https://ece.uwaterloo.ca/~cgebotys/NEW/ECE222/4.Processor.pdf p5 ALUOp encoding
  */
  assign ALUOp = ((state === 1) || (state == 2) || ((state == 3) && MemoryOp)) ? 2'b00 :// add
((state== 3) && (opcode== BEQ)) ? 2'b01 : 2'b10 ; // subtract or use function code

Also you can see this Q&A and comments related.

Upvotes: 0

ottomeister
ottomeister

Reputation: 5808

... why is the function SD, even though the funct 3 is showing 011 instead of 111?

011 is correct. The funct3 bits must be 011 in order for this to be an SD instruction. According to page 105 of https://content.riscv.org/wp-content/uploads/2017/05/riscv-spec-v2.2.pdf the SD instruction has the format:

    | imm[11:5] | rs2 | rs1 | 011 | imm[4:0] | 0100011 |

If the funct3 bits were 111 then this instruction would not be SD.

... how do I get the ALU control bits and ALUOp control bits for this function?

Since this is an SD instruction, you can read those bits straight out of the SD line of the lower table in the diagram that you referenced in your question.

Upvotes: 1

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