Reputation: 64
I'm writing a (better) hard-fault handler for my STM32f207zg and want to do the following:
1,2,4,5,7 is easy, but I'm having problems with saving/restoring from the SRAM.
The hardfault-handler calls the function fault_bksram_init() after filling up the fault_crash_t structure with data. It then calls fault_write_crash() in order to write the "report" to the SRAM. I can see using my debugger that the data is actually written to the address defined in BKPSRAM_BASE; however, after doing a reset using the debugger the memory at BKPSRAM_BASE is wiped with 0xff . In order words, the data is lost between resets.
I have the correct voltage connected to VBat (the RTC works nicely) but I have never used the backup SRAM before.
Am I missing something in the initialization of the SRAM? Is it something with doing this in a hard-fault handler that I'm missing? Or is the debugger reset that messes up the SRAM?
void fault_bksram_init(void) {
/* Enable PWR clock */
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
/* Enable backup SRAM Clock */
RCC->AHB1ENR |= RCC_AHB1ENR_BKPSRAMEN;
/* Disable write protection */
PWR->CR |= PWR_CR_DBP;
/* Enable backup regulator */
PWR->CSR |= PWR_CSR_BRE;
/* Wait for backup regulator to be ready */
while (!(PWR->CSR & (PWR_FLAG_BRR)));
}
void fault_write_crash(fault_crash_t* crash) {
/* Copy crash to BKSRAM */
memcpy((void*)BKPSRAM_BASE, (void*)crash, sizeof(fault_crash_t));
}
Upvotes: 3
Views: 3263
Reputation: 93476
The backup SRAM is not readable until the BKPSRAM clock is enabled. If you need to enabling it in the exception handler as you have, then it was not previously enabled and therefore could not have been read.
Upvotes: 2