CODEWITHSUNDEEP
spimultiplexing
Sven
Sven

Reputation: 1404

Where is the SPI multiplexer of my dreams?

Consider you have an SPI bus with only a single chip select. Is there a chip such that I can connect 8 or more devices to that SPI bus?

To simplify things, you may assume that all devices agree on the SPI mode (data needs to be valid on a rising edge). Also, all devices are of the time, where chip selects stays low for the whole transfer, and is not toggled after each word.

The SPI multiplexer could have 4 inputs:

and 9 outputs:

MISO and MOSI are connected directly to the slaves. The slaves have their SPI clock connected to the output clock and their chips selects are connected to one of the 8 slave chip selects.

The SPI multiplexer would take the two bytes of each SPI transfer as its own input. The first byte could indicate which slave is to be selected. For configuration of the multiplexer, a ninth address could be allowed.

If one of the 8 slaves is selected, the multiplexer would then activate the slave's chip select after the first byte (or even after the first few bits of the first byte). The output clock would activate with the start of the second byte and it would be synchronous to the input clock. Leaving the clock inactive during the first byte makes sure that the slaves never take notice of the first byte.

Such a chip does not seem to exist. I found solutions with two chip selects, but that's not an option to upgrade old hardware designs with just a single chip select.

Does such a thing exist?

Upvotes: 4

Views: 7117

Answers (3)

kelly kaneswaran
kelly kaneswaran

Reputation: 1

The PGA280 from TI does exactly this.Its main function is a PGA but it has a unique spi feature in that each PGA has 8 CS lines to connect to up to 8 other API controlled devices. Om transmission to the main device you send a command which tells it which CS line to toggle for subsequent data packets. Depending on your needs the PGA may be useful but if not the part may prove to expensive for the application.

Upvotes: 0

Brian Anderson
Brian Anderson

Reputation: 129

Just use a 1:8 demux, no need for byte addressing, just 3 GPIO select lines mux for your data line.

Upvotes: 0

Simson
Simson

Reputation: 3559

It does not exist because there is no need for it. Often CS is only controlled from software as a regular gpio before initiating an SPI transfer, then you could just wire the different slaves to different GPIO and use them as CS. If the CS is generated and needed by the hardware block you gate this signal with the external chip select to choose the wanted slave.

Your proposed one byte to select bus would also break all software which relay on writing from and reading to the same buffer, and it would be decrease the available bandwidth with control signals.

As a side note with recent development with secure enclaves and Trustzone the trend is not to share spi buses but rather hard wire them so only code running in the trusted part of the SoC will be able to access the connected slave.

Upvotes: 1

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