user10011538
user10011538

Reputation: 137

VHDL Comparison Operation Not Defined with Looping Counter

I've been trying to make an SRAM chip in vhdl with arbitrary amount of registers and register size using generics and I've almost gotten it to work except for the addressing part.

To make an arbitrary sized SRAM chip I started by making a unit SRAM Cell (which I tested to confirm that it works) with the following port map.

component SRAM_Cell_vhdl
port (
        IN : in std_ulogic;
        Select_Chip : in std_ulogic;
        Write_Enable : in std_ulogic;
        Out1 : out std_ulogic
);

The generic SRAM chip has the following port map:

port (
    Datain : in std_logic_vector(m-1 downto 0);
    address: in std_logic_vector(n-1 downto 0);
    Chip_Select: in std_logic;
    Output_Enable: in std_logic;
    Write_Enable: in std_logic;
    Out2: out std_logic_vector(m-1 downto 0)
);

The way I'm trying to do the addressing is that when it generates the SRAM it checks if the loop counter is equal to the address. If it is it will write the bit to the SRAM cell, if not it will not.

  loop1: for I in 0 to n-1 generate
    loop2: for J in 0 to m-1 generate
            SRAM_Cell_vhdl1 : SRAM_Cell_vhdl port map
                (Datain(J), Chip_Select and (I = to_integer(unsigned(address))), Write_Enable and Chip_Select, intermediate_out(I, J));
        end generate loop2;
    end generate loop1;

However, I am getting an error at I = to_integer(unsigned(address))) telling me that it can't determine the definition of the operation "=". I thought that a loop counter is an integer and the way I'm converting the address to an integer it should be doing a comparison between two integers. The other way I thought of doing this is to use an if statement comparing I and the address, but then I fear that it will not generate all of the required SRAM cells.

Is there a way to solve this problem?

Upvotes: 0

Views: 309

Answers (2)

Matthew
Matthew

Reputation: 13987

The = operator returns a boolean. So, the expression

Chip_Select and (I = to_integer(unsigned(address)))

when associated with an input port of type std_ulogic requires a version of the and operator with an input of type std_ulogic, an input of type boolean and a return value of type std_ulogic. (This list of types is called its signature). No such version of the and operator exists.

There is a version of theand operator that with two inputs of type std_ulogic and a return value of type std_ulogic. So, in order to use that, your compiler is trying to find a version of the = operator that returns a std_ulogic. No such version exists. Hence your error.

Solving this problem is not straight forward, because you'll need an array of chip select signals. So, you'll need something like this (as there's no MCVE, I haven't tested it):

loop1: for I in 0 to n-1 generate
  loop2: for J in 0 to m-1 generate
    if Chip_Select = '1' and (I = to_integer(unsigned(address))) then
      CS(I)(J) <= '1';
    else
      CS(I)(J) <= '0';
    end if;
    SRAM_Cell_vhdl1 : SRAM_Cell_vhdl port map (Datain(J), CS(I)(J), Write_Enable and Chip_Select, intermediate_out(I, J));
  end generate loop2;
end generate loop1;

where CS is some kind of array of std_ulogic.

Upvotes: 2

Sai Varun
Sai Varun

Reputation: 105

Firstly, your code is not MCVE. It would have been more helpful if it was. I guess the below alternative should work.

loop1: for I in 0 to n-1 generate
  loop2: for J in 0 to m-1 generate

    signal2 <= Write_Enable and Chip_Select;

    check1: if (I = to_integer(unsigned(address))) generate
      signal1 <= Chip_Select and std_ulogic(unsigned(address));      
    end generate check1;

    SRAM_Cell_vhdl1 : SRAM_Cell_vhdl port map (Datain(J), signal1 , signal2 , intermediate_out(I, J));

  end generate loop2;
end generate loop1;

Also, I would prefer using named association rather than positional association in port map

Upvotes: 0

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