Reputation: 1
I have to create a Makefile which creates a single executable from the .c files in different folders. The .c files include header files from any of these folders. The root directory has 3 sub directories x/y, x/z, a, all these sub directories have some .c and .h files. I want to compile the program from the root directory. The nature of these sub directories is that new .c files may be added/removed anytime so it is not possible to hard code their names in the Makefile.
So far I have created this Makefile
CC = gcc
INCLUDES = -Ix/y -Ix/z -Ia -Ilib/include
LIB = -lp -lq -lr
demo: x/y/*_d.o x/z/*_l.o a/*_m.o
$(CC) $^ $(LIB) -Llib -o b/demo.exe
%_d.o:: x/y/%.c
$(CC) $(INCLUDES) -c $<
%_l.o:: x/z/%.c
$(CC) $(INCLUDES) -c $<
%_m.o:: a/%.c
$(CC) $(INCLUDES) -c $<
I need a solution that will take care of this scenario on its own. Also, if a single file is added to one of these folders then only its dependencies should be built instead of building all .c files all over again. TIA.
Upvotes: 0
Views: 1605
Reputation: 665
You are mostly there. You just need a simple rule to compile .c into a .o, something like
.c.o: $(CC) $(INCLUDES) -c $<
Dependencies with wildcards are OK.
Upvotes: 0