CODEWITHSUNDEEP
makefile
curlywei
curlywei

Reputation: 720

How to block "make" command in makefile

I write makefile, which structure like following

#... Configure basic flags for compiler

.PHONY: mk_mingw
mk_mingw:
# build with mingw(windows)

.PHONY: mk_gcc_linux
mk_gcc_linux:
# build in gcc(linux)

#... some auxiliary unit such as clear, test ...

Use the following command when building with mingw(windows)

#command 1
$ make mk_mingw

Use the following command when building with gcc(Linux)

#command 2
$ make mk_gcc_linux

I hope the above two commands are legal in my project.

mk_gcc_linux and mk_mingw are environment of compiler(I specified)

But following commands isn't:

#command 3
$ make

Because it's not specify environment of compiler after make command.

I want make to report an error and stop when this situation(command 3) happens.

How do I do in my makefile?

Upvotes: 0

Views: 350

Answers (1)

Matt
Matt

Reputation: 15196

By default, make tries to build the very first target. So you can simply put this on top of your Makefile:

.PHONY: first
first:
    @echo Environment not specified!
    @false
# the rest of file is following...

But for me it doesn't look quite right. Probably, setting a variable, instead of a dedicated target, is better.

Upvotes: 1

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