CODEWITHSUNDEEP
makefilegnu-make
Jeff Saremi
Jeff Saremi

Reputation: 3024

How to create a function to generate a list of pre-requisites for a target in make

I have tried several ways of doing this unsuccessfully.

I have some targets which have pre-requisites of the same structure. So i'm trying to come up with a custom function that simplifies writing these prereqs.

Prerequisites: all files under "overlay" folder + the file: Dockerfile

sample folder structure:

a/
 + Dockerfile
 + overlay/
          + file1
          + file2

Suggested re-use style in Makefile:

a_image: $(call GetDockerFiles,$@)
# or whatever else that is recommended

Generated target/prerequisites line in Makefile:

a_image: a/Dockerfile a/overlay a/overlay/file1 a/overlay/file2

How can I achieve this using a re-usable mechanism?

Upvotes: 0

Views: 45

Answers (1)

Beta
Beta

Reputation: 99172

Let's take this in stages.

Here is the rule you want to construct for a_image:

a_image: a/Dockerfile a/overlay a/overlay/file1 a/overlay/file2
    ...

First you want to construct the list of contents of overlay/ on the fly:

a_image: a/Dockerfile a/overlay $(wildcard a/overlay/*)
    ...

Second, you want this approach to work for b_image, c_image and the rest, so the obvious approach is a pattern rule:

%_image: $*/Dockerfile $*/overlay $(wildcard $*/overlay/*)
    @echo THIS WILL NOT WORK

This will not work because automatic variables like $* are not normally available in the prerequisite list, nor will Make wait until you choose a target before it expands that wildcard call. Not normally. But if you use Secondary Expansion it will work, you just have to be careful about escaping the $ symbols:

.SECONDEXPANSION:
%_image:  $$*/Dockerfile $$*/overlay $$(wildcard $$*/overlay/*)
    @echo Prereqs: $^

Upvotes: 1

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