CODEWITHSUNDEEP
system-verilog
Sidharth
Sidharth

Reputation: 1

Why the value changes on macro assignment to a variable?

Here in the below code . `append(MANGO); returns 25. where as val = `append(MANGO); value getting stored in val is 53 .Why is it happening like that? 

`define T_APPLE_FRUIT 13
`define T_MANGO_FRUIT 25

`define append(MOD) `"`T_``MOD``_FRUIT`"

module test;
  bit[7:0] val;

  initial begin
    $display(`append(MANGO));

    $display ("\n\n%d\n",val);
    val = `T_MANGO_FRUIT;

    $display ("%d\n",val);
    val = `append(MANGO);

    $display ("\n%d\n",val);
  end
endmodule

run -all;
 KERNEL: 25
 KERNEL: 
 KERNEL: 
 KERNEL:   0
 KERNEL: 
 KERNEL:  25
 KERNEL: 
 KERNEL: 
 KERNEL:  53
 KERNEL: 
 KERNEL: Simulation has finished. There are no more test vectors to simulate.

Upvotes: 0

Views: 119

Answers (1)

Serge
Serge

Reputation: 12354

  1. the first $display gets the quoted string as an argument, as it is defined in your macro. It is supposed to display this string, nothing else. No idea why your compiler does wrong job there and displays a number.

  2. you define 'val' as bit[7:0]. This makes val a 2-state variable with initial value of 0. Therefore your first $display is supposed to print 0'

  3. you assign value of the T_MANGO_FRUIT macro to the val, which is 25 and is displayed as such

  4. you assign an array of characters as a double-quoted string ("T_MANGO_FRUIT") to val. Again, not sure why you are getting 53 there, it is supposed to be 84, which is an ascii code of the first char T. Which compiler did you use?

My guess is that you wanted to define append as this:

`define append(MOD) `T_``MOD``_FRUIT

Upvotes: 1

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