CODEWITHSUNDEEP
system-verilog
Charles Clayton
Charles Clayton

Reputation: 17956

How to store return value from $system("...") call in SystemVerilog?

If I simulate the following module:

module test;

    longint seconds;
    initial begin
        seconds = $system("date +%s");
        $display("Seconds: %0d", seconds);
        $finish;
    end

endmodule

The output from both ncsim and vsim is:

1571172006
Seconds: 0

So I can see that the $system call is printing the time in seconds 1571172006, however the variable seconds has a value of 0 so I'm not saving that value.

Is there a way for me to save that value? (Preferably not using DPI)

Thanks in advance.

edaplayground link

Upvotes: 2

Views: 5383

Answers (2)

dave_59
dave_59

Reputation: 42698

I don't know why you wouldn't want to use the DPI. Much simpler than Matthew's approach. 😊

module test;
  import "DPI-C" function longint date();
    longint seconds;
    initial begin
      seconds = date();
        $display("Seconds: %0d", seconds);
        $finish;
    end

endmodule

#include <time.h>
long int date() {
  return time(NULL);
}

https://www.edaplayground.com/x/5NTw

Upvotes: 5

Matthew
Matthew

Reputation: 13977

It's horrible, but you can pipe the output of your linux command into a file and then read the file:

$system("date +%s | tee date.txt");
fd = $fopen("date.txt","r");
count=($fgets(s, fd) == 0);        assert(count == 0);
count=($sscanf(s,"%d", seconds));  assert(count == 1);
$display("Seconds: %0d", seconds);

module test;

  longint seconds;
  initial begin
    int fd;
    int count;
    string s;
    $system("date +%s | tee date.txt");
    fd = $fopen("date.txt","r");
    count=($fgets(s, fd) == 0);        assert(count == 0);
    count=($sscanf(s,"%d", seconds));  assert(count == 1);
    $display("Seconds: %0d", seconds);
    $finish;
  end

endmodule

https://www.edaplayground.com/x/4R5e

Upvotes: 2

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