CODEWITHSUNDEEP
cmakefilec-preprocessor
Komal R.
Komal R.

Reputation: 31

How to include makefile variable in include preprocessor directive

I want to include header files based on makefile variables.

MakeFile

DISC     := left

Pass this variable to the C program like below:

CFLAGS += -DNAME=\"$(DISC)\"

In main.c, need to include header for correct disc based on makefile variable.

Is it possible to do

#include "NAME_header.h"

(where NAME is passed from makefile)

I am getting compilation error Error: NAME_header.h is not found.

Is this really possible to include header files in this way?

Upvotes: 2

Views: 1453

Answers (2)

Maxim Egorushkin
Maxim Egorushkin

Reputation: 136208

A working solution:

Makefile:

DISC := left
CFLAGS += -DNAME=$(DISC)

C or C++ source:

#define STR(s) STR2(s)
#define STR2(s) #s
#define EXPAND(s) s

#include STR(EXPAND(NAME)_header.h)

Upvotes: 3

dash-o
dash-o

Reputation: 14424

Alternative solution; consider using a proxy file. See more details below about mixing macros and #include.

In the Makefile, create v_header.h

echo '#include "${DISC}_header.h"' > v_header.h

Which can be included

#include "v_header.h"

At this time, the cpp grammer does not allow the usage of macros as part of the '#include' statement. It must be '"path.h"' or ''. The "stringifaction" operators (both '#' and '##') are not processed for pre-processor directives (line starting with '#')

// Not working
#include NAME
#include #NAME
#include "#NAME"
#include "##NAME"

Upvotes: 0

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