CODEWITHSUNDEEP
x86operating-systemvirtual-memorysystems-programmingpage-tables
Tantillo
Tantillo

Reputation: 377

Pagetable nomenclature

While researching virtual memory, I sometimes see conflicting use of the nouns page table, page table entry, and page. For example "A page table is a table of pages..." and "A page table holds page table entries".

My understanding of the relationships (in the context of x86-64) are as follows:

Is this high-level summary, and use of the aforementioned nouns, accurate?

Upvotes: 1

Views: 293

Answers (1)

Brendan
Brendan

Reputation: 37232

Is this high-level summary, and use of the aforementioned nouns, accurate?

Not quite (none of the entries ever contain virtual addresses). For "plain 32-bit paging" on 80x86 (2 levels):

  • A page directory is an array of page directory entries

    • A page directory entry contains the physical address of a page table, with some bits (that would've been zero) re-purposed for various flags (e.g. permission bits)

  • A page table is an array of page table entries

    • A page table entry contains the physical address of a page, with some bits (that would've been zero) re-purposed for various flags (e.g. permission bits)

For "long mode paging" on 80x86 (4 levels):

  • A PML4 (Page Map Level 4) is an array of PML4 entries

    • A PML4 entry contains the physical address of a page, with some bits (that would've been zero) re-purposed for various flags (e.g. permission bits)

  • A PDPT (Page Directory Pointer Table) is an array of PDPT entries

    • A PDPT entry contains the physical address of a page directory, with some bits (that would've been zero) re-purposed for various flags (e.g. permission bits)

  • A page directory is an array of page directory entries

    • A page directory entry contains the physical address of a page table, with some bits (that would've been zero) re-purposed for various flags (e.g. permission bits)

  • A page table is an array of page table entries

    • A page table entry contains the physical address of a page, with some bits (that would've been zero) re-purposed for various flags (e.g. permission bits)

Of course there's a pattern here:

  • A <NAME> is an array of <NAME> entries

    • A <NAME> entry contains the physical address of a <NEXT_LOWER_LEVEL_NAME>, with some bits (that would've been zero) re-purposed for various flags (e.g. permission bits)

.. where "<NAME>" is (from highest to lowest) one of: PML5, PML4, Page Directory Pointer Table, Page Directory, Page Table.

Upvotes: 2

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