CODEWITHSUNDEEP
makefile
Kamath
Kamath

Reputation: 4664

makefile - dependency generator

I have two questions to a single problem that I am facing.

We have adopted non-recursive boilermake for projects that use gcc. Going ahead we would like to use it for some other cross compilers say microchip C18 that do not support -MM / MD option for dependency generation.

I do not want to use makedepend since it's very old and adds in dependencies to makefiles; further, I believe it will be difficult separate objects from sources with makedepend.

Finally my questions:

  1. Are there any readily available C/C++ dependency generators (similar to -MM / -MD options)? (Build support is required for both Windows and Linux.)

  2. Can I use gcc to only generate dependency files and do the actual compilation with some other compiler? Will I run into any problems with this approach? If yes, what will be the changes required to the following 

    # COMPILE_C_CMDS - Commands for compiling C source code.
define COMPILE_C_CMDS
    @mkdir -p $(dir $@)
    $(strip ${CC} -o $@ -c -MD ${CFLAGS} ${SRC_CFLAGS} ${INCDIRS} \
        ${SRC_INCDIRS} ${SRC_DEFS} ${DEFS} $<)
    @cp ${@:%$(suffix $@)=%.d} ${@:%$(suffix $@)=%.P}; \
     sed -e 's/#.*//' -e 's/^[^:]*: *//' -e 's/ *\\$$//' \
         -e '/^$$/ d' -e 's/$$/ :/' < ${@:%$(suffix $@)=%.d} \
         >> ${@:%$(suffix $@)=%.P}; \
         rm -f ${@:%$(suffix $@)=%.d}
endef

Upvotes: 1

Views: 979

Answers (1)

Beta
Beta

Reputation: 99084

  1. I don't know of any, other than makedepend (but I don't entirely understand you aversion to it).
  2. Yes, definitely. The dependency handling is entirely a matter of GCC talking to GNUMake (I hope you're using GNUMake). The other compiler doesn't need to know anything about it. 
# COMPILE_C_CMDS - Commands for compiling C source code.
define COMPILE_C_CMDS
    @mkdir -p $(dir $@)
    # This line generates the dependency file foo.d
    $(strip ${CC} -o $@ -MM -MF ${@:%$(suffix $@)=%.d} ${CFLAGS} ${SRC_CFLAGS} \
        ${INCDIRS} ${SRC_INCDIRS} ${SRC_DEFS} ${DEFS} $<)
    # This one actually compiles. You must adapt the sytax for your compiler.
    $(strip ${SOME_OTHER_COMPILER} -o $@ -c ${CFLAGS} ${SRC_CFLAGS} ${INCDIRS} \
        ${SRC_INCDIRS} ${SRC_DEFS} ${DEFS} $<)
    @cp ${@:%$(suffix $@)=%.d} ${@:%$(suffix $@)=%.P}; \
     sed -e 's/#.*//' -e 's/^[^:]*: *//' -e 's/ *\\$$//' \
         -e '/^$$/ d' -e 's/$$/ :/' < ${@:%$(suffix $@)=%.d} \
         >> ${@:%$(suffix $@)=%.P}; \
         rm -f ${@:%$(suffix $@)=%.d}
endef

P.S. Your makefile will probably be cleaner if you do this as a pattern rule, not a defined command, but one thing at a time.

Upvotes: 1

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